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» Combining optimizations in automated low power design
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ICCD
2005
IEEE
111views Hardware» more  ICCD 2005»
15 years 6 months ago
Low- and Ultra Low-Power Arithmetic Units: Design and Comparison
Design guidelines for low- and ultra low-power arithmetic units are presented. We analyze structures for addition in the energy-delay space to determine the most suitable for thes...
Milena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdz...
CASES
2007
ACM
15 years 1 months ago
A low power front-end for embedded processors using a block-aware instruction set
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Ahmad Zmily, Christos Kozyrakis
SAMOS
2007
Springer
15 years 3 months ago
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction
In this paper, we use the CoDeL hardware design platform to analyze the potential and performance impact of power gating individual registers. For each register, we examine the per...
Nainesh Agarwal, Nikitas J. Dimopoulos
DSD
2006
IEEE
183views Hardware» more  DSD 2006»
15 years 3 months ago
Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core
The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption h...
Panu Hämäläinen, Timo Alho, Marko H...
DAC
1999
ACM
15 years 1 months ago
Automated Phase Assignment for the Synthesis of Low Power Domino Circuits
High performance circuit techniques such as domino logic have migrated from the microprocessor world into more mainstream ASIC designs. The problem is that domino logic comes at a...
Priyadarshan Patra, Unni Narayanan