838 search results - page 73 / 168 » Combining optimizations in automated low power design |
ITC
2002
IEEE
15 years 2 months ago
2002
IEEE
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
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PPL
2008
14 years 9 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
TWC
2010
14 years 4 months ago
2010
In this paper, the training sequence design for multiple-input multiple-output (MIMO) orthogonal frequencydivision multiplexing (OFDM) systems under the minimum mean square error (...
IWCMC
2006
ACM
15 years 3 months ago
2006
ACM
In this paper we present and evaluate a new technique to lower packet-level error rates of application layer connections in wireless ad-hoc networks. In our scheme, data packets s...