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CONIELECOMP
2011
IEEE
14 years 1 months ago
FPGA design and implementation for vertex extraction of polygonal shapes
This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduce...
Jorge Martínez-Carballido, Jorge Guevara-Es...
ELECTRONICMARKETS
2011
140views more  ELECTRONICMARKETS 2011»
14 years 4 months ago
Reaching into patients' homes - participatory designed AAL services - The case of a patient-centered nutrition tracking service
Abstract Ambient Assisted Living (AAL) offers possibilities for promising new IT-based health care services that are resulting in new challenges for its design process. We introduc...
Philipp Menschner, Andreas Prinz, Philip Koene, Fe...
GLVLSI
2009
IEEE
113views VLSI» more  GLVLSI 2009»
15 years 1 months ago
Reducing parity generation latency through input value aware circuits
1 Soft errors caused by cosmic particles and radiation emitted by the packaging are an important problem in contemporary microprocessors. Parity bits are used to detect single bit ...
Yusuf Osmanlioglu, Y. Onur Koçberber, Oguz ...
3DGIS
2006
Springer
15 years 3 months ago
Texture Generation and Mapping Using Video Sequences for 3D Building Models
Abstract Three-dimensional (3D) building model is one of the most important components in a cyber city implementation and application. This study developed an effective and highly ...
Fuan Tsai, Cheng-Hsuan Chen, Jin-Kim Liu, Kuo-Hsin...
PAMI
2006
227views more  PAMI 2006»
14 years 9 months ago
Matching 2.5D Face Scans to 3D Models
The performance of face recognition systems that use two-dimensional images depends on factors such as lighting and subject's pose. We are developing a face recognition system...
Xiaoguang Lu, Anil K. Jain, Dirk Colbry