An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
We consider impulsive systems with several reset maps triggered by independent renewal processes, i.e., the intervals between jumps associated with a given reset map are identicall...
Dynamically reconfigurable architectures offer extremely fast solutions to various problems. The Circuit Switched Tree (CST) is an important interconnect used to implement such ar...
Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L...
At Leiden University, we are developing a design methodology that allows for fast mapping of nested-loop applications (e.g. DSP, Imaging, or MultiMedia) written in a subset of Matl...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...
Abstract. This paper proposes a new model of communication in multiagent systems according to which the semantics of communication depends on their pragmatics. Since these pragmati...
Michael Rovatsos, Matthias Nickles, Gerhard Wei&sz...