366 search results - page 19 / 74 » Communication Complexity with Synchronized Clocks |
107
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CASES
2007
ACM
15 years 3 months ago
2007
ACM
Advances in semiconductor technologies have placed MPSoCs center stage as a standard architecture for embedded applications of ever increasing complexity. Efficient utilization of...
122
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CDES
2010
14 years 9 months ago
2010
This paper describes the design of a delay-insensitive (DI) Cell Matrix. This architecture allows for massively parallel, self-determined operation and can be used to implement reg...
103
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ISLPED
2003
ACM
15 years 5 months ago
2003
ACM
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
102
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ICCAD
2003
IEEE
15 years 8 months ago
2003
IEEE
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
110
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ICC
2008
IEEE
15 years 6 months ago
2008
IEEE
In this paper, we investigate the low-complexity synchronization design for multi-band orthogonalfrequency-division-multiplexing (MB-OFDM) ultra-wideband (UWB) systems. We propose...