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» Communication Complexity with Synchronized Clocks
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HPCA
2005
IEEE
15 years 5 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
DC
2006
14 years 12 months ago
Performing work in broadcast networks
We consider the problem of how to schedule t similar and independent tasks to be performed in a synchronous distributed system of p stations communicating via multiple-access chan...
Bogdan S. Chlebus, Dariusz R. Kowalski, Andrzej Li...
CORR
2010
Springer
146views Education» more  CORR 2010»
14 years 12 months ago
Modified Bully Algorithm using Election Commission
-- Electing leader is a vital issue not only in distributed computing but also in communication network [1, 2, 3, 4, 5], centralized mutual exclusion algorithm [6, 7], centralized ...
Muhammad Mahbubur Rahman, Afroza Nahar
COMPSAC
1998
IEEE
15 years 4 months ago
Allocating Data Objects to Multiple Sites for Fast Browsing of Hypermedia Documents
Many world wide web applications require access, transfer, and synchronization of large multimedia data objects (MDOs) (such as, audio, video, and images) across the communication...
Siu-Kai So, Ishfaq Ahmad, Kamalakar Karlapalem
ICC
2007
IEEE
102views Communications» more  ICC 2007»
15 years 6 months ago
Distributed Scheduling in Input Queued Switches
— Dealing with RTTs (Round Trip Time) in IQ switches has been recently recognized as a challenging problem, especially if considering distributed (multi-chip) scheduler implement...
Alessandra Scicchitano, Andrea Bianco, Paolo Giacc...