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» Communication Mechanisms for Parallel DSP Systems on a Chip
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IJPP
2006
145views more  IJPP 2006»
14 years 11 months ago
Deterministic Parallel Processing
Abstract. In order to address the problems faced in the wireless communications domain, picoChip has devised the picoArrayTM . The picoArrayTM is a tiled-processor architecture, co...
Gajinder Panesar, Daniel Towner, Andrew Duller, Al...
CLUSTER
2005
IEEE
15 years 5 months ago
A Generic Proxy Mechanism for Secure Middlebox Traversal
Firewalls/NATs have brought significant connectivity problems along with their benefits, causing many applications to break or become inefficient. Due to its bi-directional commun...
Se-Chang Son, Matthew Farrellee, Miron Livny
ISCA
1994
IEEE
104views Hardware» more  ISCA 1994»
15 years 3 months ago
Exploring the Design Space for a Shared-Cache Multiprocessor
In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
Basem A. Nayfeh, Kunle Olukotun
CASES
2007
ACM
15 years 3 months ago
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs
Advances in semiconductor technologies have placed MPSoCs center stage as a standard architecture for embedded applications of ever increasing complexity. Efficient utilization of...
Chengmo Yang, Alex Orailoglu
LPNMR
2009
Springer
15 years 6 months ago
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs
Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
Harold Ishebabi, Philipp Mahr, Christophe Bobda, M...