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DATE
2006
IEEE
90views Hardware» more  DATE 2006»
15 years 3 months ago
Microarchitectural floorplanning under performance and thermal tradeoff
— In this paper, we present the first multi-objective microarchitectural floorplanning algorithm for designing highperformance, high-reliability processors in the early design ...
Michael B. Healy, Mario Vittes, Mongkol Ekpanyapon...
DATE
2002
IEEE
102views Hardware» more  DATE 2002»
15 years 2 months ago
Library Compatible Ceff for Gate-Level Timing
Accurate gate-level static timing analysis in the presence of RC loads has become an important problem for modern deep-submicron designs. Non-capacitive loads are usually analyzed...
Bernard N. Sheehan
78
Voted
BMCBI
2007
157views more  BMCBI 2007»
14 years 9 months ago
A hybrid multiscale Monte Carlo algorithm (HyMSMC) to cope with disparity in time scales and species populations in intracellula
Background: The fundamental role that intrinsic stochasticity plays in cellular functions has been shown via numerous computational and experimental studies. In the face of such e...
Asawari Samant, Babatunde A. Ogunnaike, Dionisios ...
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
15 years 3 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
ASPDAC
2006
ACM
131views Hardware» more  ASPDAC 2006»
15 years 3 months ago
POSIX modeling in SystemC
- Early estimation of the execution time of Real-Time embedded SW is an essential task in complex, HW/SW embedded system design. Application SW execution time estimation requires t...
Hector Posadas, Jesús Ádamez, Pablo ...