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ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
15 years 6 months ago
A Trajectory Piecewise-Linear Approach to Model Order Reduction and Fast Simulation of Nonlinear Circuits and Micromachined Devi
—In this paper, we present an approach to nonlinear model reduction based on representing a nonlinear system with a piecewise-linear system and then reducing each of the pieces w...
Michal Rewienski, Jacob White
FPGA
2008
ACM
136views FPGA» more  FPGA 2008»
14 years 11 months ago
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs
Functional full-system simulators are powerful and versatile research tools for accelerating architectural exploration and advanced software development. Their main shortcoming is...
Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Bab...
ICCAD
1997
IEEE
133views Hardware» more  ICCAD 1997»
15 years 1 months ago
Functional simulation using binary decision diagrams
In many veri cation techniques fast functional evaluation of a Boolean network is needed. We investigate the idea of using Binary Decision Diagrams BDDs for functional simulatio...
Christoph Scholl, Rolf Drechsler, Bernd Becker
CODES
2006
IEEE
15 years 3 months ago
A multiprocessing approach to accelerate retargetable and portable dynamic-compiled instruction-set simulation
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...
Wei Qin, Joseph D'Errico, Xinping Zhu
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
15 years 3 months ago
Two-level microprocessor-accelerator partitioning
The integration of microprocessors and field-programmable gate array (FPGA) fabric on a single chip increases both the utility and necessity of tools that automatically move softw...
Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank V...