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DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 1 months ago
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-...
ASPDAC
2006
ACM
169views Hardware» more  ASPDAC 2006»
15 years 4 months ago
A real-time and bandwidth guaranteed arbitration algorithm for SoC bus communication
– In shared SoC bus systems, arbiters are usually adopted to solve bus contentions with various kinds of arbitration algorithms. We propose an arbitration algorithm, RT_lottery, ...
Chien-Hua Chen, Geeng-Wei Lee, Juinn-Dar Huang, Ji...
TVLSI
2008
164views more  TVLSI 2008»
14 years 10 months ago
Dynamically Configurable Bus Topologies for High-Performance On-Chip Communication
The on-chip communication architecture is a major determinant of overall performance in complex System-on-Chip (SoC) designs. Since the communication requirements of SoC components...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
ASPDAC
2007
ACM
109views Hardware» more  ASPDAC 2007»
15 years 2 months ago
Communication Architecture Synthesis of Cascaded Bus Matrix
Jun-hee Yoo, Dongwook Lee, Sungjoo Yoo, Kiyoung Ch...