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DAC
2003
ACM
15 years 3 months ago
Low-power design methodology for an on-chip bus with adaptive bandwidth capability
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III
INFOCOM
1992
IEEE
15 years 2 months ago
A TDM-based Multibus Packet Switch
A new packet switch architecture using two sets of time-division multiplexed buses is proposed. The horizontal buses collect packets from the input links, while the vertical buses ...
Tak-Shing Peter Yum, Yiu-Wing Leung
80
Voted
DAC
2005
ACM
15 years 11 months ago
Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs
We propose two novel integration techniques -- bypass and bookkeeping -- in the memory controller to address the cache coherence compatibility issue of a non-shared bus heterogene...
Taeweon Suh, Daehyun Kim, Hsien-Hsin S. Lee
69
Voted
DAGSTUHL
2004
14 years 11 months ago
Bus Scheduling for TDL Components
This paper describes a solution for bus scheduling of distributed multi-mode TDL (Timing Definition Language) components. The TDL component model is based on the concept of Logical...
Emilia Farcas, Wolfgang Pree, Josef Templ
IV
2009
IEEE
173views Visualization» more  IV 2009»
15 years 4 months ago
MostVis: An Interactive Visualization Supporting Automotive Engineers in MOST Catalog Exploration
The MOST bus is a current bus technology for connecting multimedia components in cars, such as radios, navigation systems, or media players. The bus functionality is described in ...
Michael Sedlmair, Christian Bernhold, Daniel Herrs...