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ASPDAC
2007
ACM
103views Hardware» more  ASPDAC 2007»
15 years 2 months ago
Slack-based Bus Arbitration Scheme for Soft Real-time Constrained Embedded Systems
- We present a bus arbitration scheme for soft real-time constrained embedded systems. Some masters in such systems are required to complete their work for given timing constraints...
Minje Jun, Kwanhu Bang, Hyuk-Jun Lee, Naehyuck Cha...
PDP
2005
IEEE
15 years 3 months ago
Memory Bandwidth Aware Scheduling for SMP Cluster Nodes
Clusters of SMPs are becoming increasingly common. However, the shared memory design of SMPs and the consequential contention between system processors for access to main memory c...
Evangelos Koukis, Nectarios Koziris
DAC
2005
ACM
15 years 11 months ago
FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology
In this paper, we describe FLEXBUS, a flexible, high-performance onchip communication architecture featuring a dynamically configurable topology. FLEXBUS is designed to detect run...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
85
Voted
DATE
2009
IEEE
126views Hardware» more  DATE 2009»
15 years 4 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...
ISQED
2008
IEEE
154views Hardware» more  ISQED 2008»
15 years 4 months ago
Error Protected Data Bus Inversion Using Standard DRAM Components
Off-chip communication consumes a significant part of main memory system power. Existing solutions imply the use of specialized memories or assume error free environments. This i...
Maurizio Skerlj, Paolo Ienne