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ASPDAC
2010
ACM
161views Hardware» more  ASPDAC 2010»
15 years 3 months ago
A dual-MST approach for clock network synthesis
Abstract--In nanometer-scale VLSI physical design, clock network becomes a major concern on determining the total performance of digital circuit. Clock skew and PVT (Process, Volta...
Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham, Evangel...
INFOCOM
2010
IEEE
15 years 3 months ago
SafeQ: Secure and Efficient Query Processing in Sensor Networks
The architecture of two-tiered sensor networks, where storage nodes serve as an intermediate tier between sensors and a sink for storing data and processing queries, has been widel...
Fei Chen, Alex X. Liu
IPPS
2010
IEEE
15 years 3 months ago
Large scale complex network analysis using the hybrid combination of a MapReduce cluster and a highly multithreaded system
Complex networks capture interactions among entities in various application areas in a graph representation. Analyzing large scale complex networks often answers important question...
Seunghwa Kang, David A. Bader
SECON
2010
IEEE
15 years 3 months ago
Secondis: An Adaptive Dissemination Protocol for Synchronizing Wireless Sensor Networks
Reliability and predictability of the timing behavior have shown to be major issues for wireless sensor network deployments. Real-time requirements presented by several application...
Federico Ferrari, Andreas Meier, Lothar Thiele
INFOCOM
2010
IEEE
15 years 2 months ago
On the Feasibility and Efficacy of Protection Routing in IP Networks
With network components increasingly reliable, routing is playing an ever greater role in determining network reliability. This has spurred much activity in improving routing stabi...
Kin Wah Kwong, Lixin Gao, Roch Guérin, Zhi-...