Sciweavers

182 search results - page 37 / 37
» Compact Balanced Tries
Sort
View
ICCAD
2009
IEEE
133views Hardware» more  ICCAD 2009»
15 years 22 days ago
A parallel preconditioning strategy for efficient transistor-level circuit simulation
A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
Heidi Thornquist, Eric R. Keiter, Robert J. Hoekst...
CCR
2011
14 years 10 months ago
Measured impact of crooked traceroute
Data collected using traceroute-based algorithms underpins research into the Internet’s router-level topology, though it is possible to infer false links from this data. One sou...
Matthew J. Luckie, Amogh Dhamdhere, kc claffy, Dav...