Abstract. Reduction of chip packaging and cooling costs for deep sub-micron SystemOn-Chip (SOC) designs is an emerging issue. We present a simulation-based methodology able to real...
- The objective of this paper is to provide an effective technique for accurate modeling of the external input sequences that affect the behavior of Finite State Machines (FSMs). B...
: With technology scaling, elevated temperatures caused by increased power density create a critical bottleneck modulating the circuit operation. With the advent of FinFET technolo...
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
New measures of peak power in the context of sequential circuits are proposed. This paper presents an automatic procedure to obtain very good lower bounds on these measures as wel...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...