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» Compact Vector Generation for Accurate Power Simulation
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DATE
2005
IEEE
117views Hardware» more  DATE 2005»
15 years 3 months ago
A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs
As technology scales down, the static power is expected to become a significant fraction of the total power. The exponential dependence of static power with the operating temperat...
José Luis Rosselló, Vicens Canals, S...
ICPR
2010
IEEE
14 years 7 months ago
A Simulation Study on the Generative Neural Ensemble Decoding Algorithms
Brain-computer interfaces rely on accurate decoding of cortical activity to understand intended action. Algorithms for neural decoding can be broadly categorized into two groups: d...
Sung-Phil Kim, Min-Ki Kim, Gwi-Tae Park
ISLPED
1995
ACM
129views Hardware» more  ISLPED 1995»
15 years 1 months ago
CMOS dynamic power estimation based on collapsible current source transistor modeling
When estimating the dynamic power dissipated by a circuit di erent methods ranging from numeric analog simulation to event-driven logic simulation have been proposed. However, as ...
Abelardo Pardo, R. Iris Bahar, Srilatha Manne, Pet...
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
15 years 26 days ago
Predictive models for multimedia applications power consumption based on use-case and OS level analysis
—Power management at any abstraction level is a key issue for many mobile multimedia and embedded applications. In this paper a design workflow to generate system-level power mo...
Patrick Bellasi, William Fornaciari, David Siorpae...
ARCS
2009
Springer
15 years 4 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...