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LCTRTS
2007
Springer
15 years 3 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
ICDCS
2006
IEEE
15 years 3 months ago
Stable and Accurate Network Coordinates
Network coordinates provide a scalable way to estimate latencies among large numbers of hosts. While there are several algorithms for producing coordinates, none account for the f...
Jonathan Ledlie, Peter R. Pietzuch, Margo I. Seltz...
ISCAS
2006
IEEE
118views Hardware» more  ISCAS 2006»
15 years 3 months ago
A robust continuous-time multi-dithering technique for laser communications using adaptive optics
A robust system architecture to achieve optical coherency free optimization. Several methods that had been proposed in the in multiple-beam free-space laser communication links wit...
Dimitrios N. Loizos, Paul-Peter Sotiriadis, Gert C...
CASES
2006
ACM
15 years 3 months ago
Adapting compilation techniques to enhance the packing of instructions into registers
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
Stephen Hines, David B. Whalley, Gary S. Tyson
IMC
2006
ACM
15 years 3 months ago
Measurement based analysis, modeling, and synthesis of the internet delay space
Understanding the characteristics of the Internet delay space (i.e., the all-pairs set of static round-trip propagation delays among edge networks in the Internet) is important fo...
Bo Zhang, T. S. Eugene Ng, Animesh Nandi, Rudolf H...