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ICCAD
2009
IEEE
106views Hardware» more  ICCAD 2009»
15 years 3 months ago
An efficient pre-assignment routing algorithm for flip-chip designs
The flip-chip package is introduced for modern IC designs with higher integration density and larger I/O counts. In this paper, we consider the pre-assignment flip-chip routing pr...
Po-Wei Lee, Chung-Wei Lin, Yao-Wen Chang, Chin-Fan...
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
15 years 3 months ago
Pre-bond testable low-power clock tree design for 3D stacked ICs
Pre-bond testing of 3D stacked ICs involves testing individual dies before bonding. The overall yield of 3D ICs improves with prebond testability because designers can avoid stack...
Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung K...
ICCAD
2009
IEEE
133views Hardware» more  ICCAD 2009»
15 years 3 months ago
A parallel preconditioning strategy for efficient transistor-level circuit simulation
A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
Heidi Thornquist, Eric R. Keiter, Robert J. Hoekst...
ICCAD
2009
IEEE
161views Hardware» more  ICCAD 2009»
15 years 3 months ago
The epsilon-approximation to discrete VT assignment for leakage power minimization
As VLSI technology reaches 45nm technology node, leakage power optimization has become a major design challenge. Threshold voltage (vt) assignment has been extensively studied, du...
Yujia Feng, Shiyan Hu
ICCAD
2009
IEEE
87views Hardware» more  ICCAD 2009»
15 years 3 months ago
Mitigation of intra-array SRAM variability using adaptive voltage architecture
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
Ashish Kumar Singh, Ku He, Constantine Caramanis, ...
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