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ISCA
2011
IEEE
258views Hardware» more  ISCA 2011»
14 years 1 months ago
A case for heterogeneous on-chip interconnects for CMPs
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. ...
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
14 years 1 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...
ISCA
2011
IEEE
522views Hardware» more  ISCA 2011»
14 years 1 months ago
CPPC: correctable parity protected cache
Due to shrinking feature sizes processors are becoming more vulnerable to soft errors. Write-back caches are particularly vulnerable since they hold dirty data that do not exist i...
Mehrtash Manoochehri, Murali Annavaram, Michel Dub...
PERCOM
2011
ACM
14 years 1 months ago
Tracking vehicular speed variations by warping mobile phone signal strengths
—In this paper, we consider the problem of tracking fine-grained speeds variations of vehicles using signal strength traces from GSM enabled phones. Existing speed estimation te...
Gayathri Chandrasekaran, Tam Vu, Alexander Varshav...
RTAS
2011
IEEE
14 years 1 months ago
ARCH: Practical Channel Hopping for Reliable Home-Area Sensor Networks
Abstract—Home area networks (HANs) promise to enable sophisticated home automation applications such as smart energy usage and assisted living. However, recent empirical study of...
Mo Sha, Gregory Hackmann, Chenyang Lu
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