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» Comparing Graph Layouts for Vertex Selection Tasks
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VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
15 years 10 months ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu
ECRTS
2007
IEEE
15 years 4 months ago
Predictable Paging in Real-Time Systems: A Compiler Approach
Conventionally, the use of virtual memory in real-time systems has been avoided, the main reason being the difficulties it provides to timing analysis. However, there is a trend ...
Isabelle Puaut, Damien Hardy
JSA
2007
191views more  JSA 2007»
14 years 9 months ago
Automated memory-aware application distribution for Multi-processor System-on-Chips
Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
Heikki Orsila, Tero Kangas, Erno Salminen, Timo D....
ECRTS
2008
IEEE
15 years 4 months ago
Predictable Code and Data Paging for Real Time Systems
There is a need for using virtual memory in real-time applications: using virtual addressing provides isolation between concurrent processes; in addition, paging allows the execut...
Damien Hardy, Isabelle Puaut
EVOW
2010
Springer
15 years 1 months ago
Ant Colony Optimization for Tree Decompositions
Instances of constraint satisfaction problems can be solved efficiently if they are representable as a tree decomposition of small width. Unfortunately, the task of finding a deco...
Thomas Hammerl, Nysret Musliu