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ICCAD
2006
IEEE
101views Hardware» more  ICCAD 2006»
15 years 10 months ago
Thermal-induced leakage power optimization by redundant resource allocation
Traditionally, at early design stages, leakage power is associated with the number of transistors in a design. Hence, intuitively an implementation with minimum resource usage wou...
Min Ni, Seda Ogrenci Memik
DATE
2005
IEEE
113views Hardware» more  DATE 2005»
15 years 10 months ago
Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda...
ICDCSW
2005
IEEE
15 years 10 months ago
Probability Based Power Aware Error Resilient Coding
Error resilient encoding in video communication is becoming increasingly important due to data transmission over unreliable channels. In this paper, we propose a new power-aware e...
Minyoung Kim, Hyunok Oh, Nikil D. Dutt, Alexandru ...
SSDBM
2005
IEEE
100views Database» more  SSDBM 2005»
15 years 9 months ago
An Information Theoretic Model for Database Alignment
As with many large organizations, the Government's data is split in many different ways and is collected at different times by different people. The resulting massive data he...
Patrick Pantel, Andrew Philpot, Eduard H. Hovy
APPT
2005
Springer
15 years 9 months ago
Static Partitioning vs Dynamic Sharing of Resources in Simultaneous MultiThreading Microarchitectures
Simultaneous MultiThreading (SMT) achieves better system resource utilization and higher performance because it exploits ThreadLevel Parallelism (TLP) in addition to “conventiona...
Chen Liu, Jean-Luc Gaudiot