This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
Recently, there has been much interest in developing analyzes to detect concurrency bugs that arise because of data races, atomicity violations, execution omission, etc. However, ...
Dasarath Weeratunge, Xiangyu Zhang, William N. Sum...
We describe our experiences designing and implementing a virtual PNNI network testbed. The network elements and signaling protocols modeled are consistent with the ATM Forum PNNI ...
Kalyan S. Perumalla, Matthew Andrews, Sandeep N. B...
The paper presents in brief a methodology for development of tools for knowledge-based search in repositories of digitized manuscripts. It is designated to assist the search activ...
Implicit invocation SN92, GN91] has become an important architectural style for large-scale system design and evolution. This paper addresses the lack of speci cation and veri cat...