Sciweavers

288 search results - page 18 / 58
» Comparing memory systems for chip multiprocessors
Sort
View
CAL
2007
14 years 11 months ago
Nahalal: Cache Organization for Chip Multiprocessors
— This paper addresses cache organization in Chip Multiprocessors (CMPs). We show that in CMP systems it is valuable to distinguish between shared data, which is accessed by mult...
Zvika Guz, Idit Keidar, Avinoam Kolodny, Uri C. We...
ISQED
2010
IEEE
103views Hardware» more  ISQED 2010»
15 years 5 months ago
Thermal-aware job allocation and scheduling for three dimensional chip multiprocessor
- In this paper, we propose a thermal-aware job allocation and scheduling algorithm for three-dimensional (3D) chip multiprocessor (CMP). The proposed algorithm assigns hot jobs to...
Shaobo Liu, Jingyi Zhang, Qing Wu, Qinru Qiu
IISWC
2008
IEEE
15 years 6 months ago
PARSEC vs. SPLASH-2: A quantitative comparison of two multithreaded benchmark suites on Chip-Multiprocessors
The PARSEC benchmark suite was recently released and has been adopted by a significant number of users within a short amount of time. This new collection of workloads is not yet ...
Christian Bienia, Sanjeev Kumar, Kai Li
HIPEAC
2010
Springer
15 years 8 months ago
Maestro: Orchestrating Lifetime Reliability in Chip Multiprocessors
As CMOS feature sizes venture deep into the nanometer regime, wearout mechanisms including negative-bias temperature instability and timedependent dielectric breakdown can severely...
Shuguang Feng, Shantanu Gupta, Amin Ansari, Scott ...
ISLPED
2005
ACM
111views Hardware» more  ISLPED 2005»
15 years 5 months ago
Energy reduction in multiprocessor systems using transactional memory
The emphasis in microprocessor design has shifted from high performance, to a combination of high performance and low power. Until recently, this trend was mostly true for uniproc...
Tali Moreshet, R. Iris Bahar, Maurice Herlihy