In the near future, semiconductor technology will allow the integration of multiple processors on a chip or multichipmodule (MCM). In this paper we investigate the architecture an...
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
—The impact of shared instruction memory on performance is measured and analyzed for an FPGAbased Multiprocessor System-on-Chip (MP-SoC) with an MPEG-4 video encoding application...
Ari Kulmala, Erno Salminen, Olli Lehtoranta, Timo ...
—Memory bandwidth has always been a critical factor for the performance of many data intensive applications. The increasing processor performance, and the advert of single chip m...
Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex...
Current on-chip block-centric memory hierarchies exploit access patterns at the fine-grain scale of small blocks. Several recently proposed techniques for coherence traffic reduct...