288 search results - page 39 / 58 » Comparing memory systems for chip multiprocessors |
OOPSLA
2005
Springer
15 years 5 months ago
2005
Springer
It is now well established that the device scaling predicted by Moore’s Law is no longer a viable option for increasing the clock frequency of future uniprocessor systems at the...
102
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IPPS
2006
IEEE
15 years 5 months ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
PPOPP
1990
ACM
15 years 3 months ago
1990
ACM
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...
97
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BCS
2008
15 years 1 months ago
2008
This paper describes a customisable processor designed to accelerate execution of inductive logic programming, targeting advanced field-programmable gate array (FPGA) technology. ...
DATE
2005
IEEE
15 years 5 months ago
2005
IEEE
As Moore’s Law continues to fuel the ability to build ever increasingly complex system-on-chips (SoCs), achieving performance goals is rising as a critical challenge to completi...