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» Comparing memory systems for chip multiprocessors
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PVM
2009
Springer
15 years 6 months ago
Hierarchical Collectives in MPICH2
Abstract. Most parallel systems on which MPI is used are now hierarchical: some processors are much closer to others in terms of interconnect performance. One of the most common su...
Hao Zhu, David Goodell, William Gropp, Rajeev Thak...
ISCA
1997
IEEE
108views Hardware» more  ISCA 1997»
15 years 3 months ago
The SGI Origin: A ccNUMA Highly Scalable Server
The SGI Origin 2000 is a cache-coherent non-uniform memory access (ccNUMA) multiprocessor designed and manufactured by Silicon Graphics, Inc. The Origin system was designed from t...
James Laudon, Daniel Lenoski
80
Voted
DATE
2006
IEEE
154views Hardware» more  DATE 2006»
15 years 5 months ago
An integrated open framework for heterogeneous MPSoC design space exploration
In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs)...
Federico Angiolini, Jianjiang Ceng, Rainer Leupers...
CASES
2001
ACM
15 years 3 months ago
A system-on-a-chip lock cache with task preemption support
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
Bilge Saglam Akgul, Jaehwan Lee, Vincent John Moon...
HPCA
2007
IEEE
16 years 2 days ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...