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» Comparing memory systems for chip multiprocessors
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CODES
2007
IEEE
15 years 6 months ago
A data protection unit for NoC-based architectures
Security is gaining increasing relevance in the development of embedded devices. Towards a secure system at each level of design, this paper addresses the security aspects related...
Leandro Fiorin, Gianluca Palermo, Slobodan Lukovic...
JUCS
2006
112views more  JUCS 2006»
14 years 11 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
FPL
2005
Springer
73views Hardware» more  FPL 2005»
15 years 5 months ago
Energy-Efficient NoC for Best-Effort Communication
A Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for Multi-Processor System-onChip (MPSoC) architectures. In an earlier paper we proposed a energ...
Pascal T. Wolkotte, Gerard J. M. Smit, Jens E. Bec...
MICRO
1999
IEEE
108views Hardware» more  MICRO 1999»
15 years 4 months ago
Exploiting ILP in Page-based Intelligent Memory
This study compares the speed, area, and power of di erent implementations of Active Pages OCS98], an intelligent memory system which helps bridge the growing gap between processo...
Mark Oskin, Justin Hensley, Diana Keen, Frederic T...
DATE
2005
IEEE
117views Hardware» more  DATE 2005»
15 years 5 months ago
Low Cost Task Migration Initiation in a Heterogeneous MP-SoC
Run-time task migration in a heterogeneous multiprocessor System-on-Chip (MP-SoC) is a challenge that requires cooperation between the task and the operating system. In task migra...
Vincent Nollet, Prabhat Avasare, Jean-Yves Mignole...