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» Comparing memory systems for chip multiprocessors
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TON
2012
13 years 2 months ago
Scalable Lookahead Regular Expression Detection System for Deep Packet Inspection
—Regular expressions (RegExes) are widely used, yet their inherent complexity often limits the total number of RegExes that can be detected using a single chip for a reasonable t...
Masanori Bando, N. Sertac Artan, H. Jonathan Chao
DAC
2006
ACM
16 years 19 days ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
79
Voted
CASES
2009
ACM
15 years 6 months ago
Optimal loop parallelization for maximizing iteration-level parallelism
This paper solves the open problem of extracting the maximal number of iterations from a loop that can be executed in parallel on chip multiprocessors. Our algorithm solves it opt...
Duo Liu, Zili Shao, Meng Wang, Minyi Guo, Jingling...
114
Voted
HIPC
2004
Springer
15 years 5 months ago
Parallel Performance of Hierarchical Multipole Algorithms for Inductance Extraction
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
Hemant Mahawar, Vivek Sarin, Ananth Grama
111
Voted
BIRTHDAY
2012
Springer
13 years 7 months ago
A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors
3-D integration presents many new opportunities for architects and embedded systems designers. However, 3-D integration has not yet been explored by the cryptographic hardware com...
Jonathan Valamehr, Ted Huffmire, Cynthia E. Irvine...