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» Comparing memory systems for chip multiprocessors
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ISCA
2011
IEEE
258views Hardware» more  ISCA 2011»
14 years 3 months ago
A case for heterogeneous on-chip interconnects for CMPs
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. ...
IJHPCN
2006
106views more  IJHPCN 2006»
14 years 11 months ago
Performance evaluation of the Sun Fire Link SMP clusters
As symmetric multiprocessors become commonplace, the interconnection networks and the communication system software in clusters of multiprocessors become critical to achieving high...
Ying Qian, Ahmad Afsahi, Nathan R. Fredrickson, Re...
DSD
2010
IEEE
112views Hardware» more  DSD 2010»
14 years 10 months ago
Re-NUCA: Boosting CMP Performance Through Block Replication
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
Pierfrancesco Foglia, Cosimo Antonio Prete, Marco ...
MSE
2002
IEEE
135views Hardware» more  MSE 2002»
15 years 4 months ago
The Impact of SMT/SMP Designs on Multimedia Software Engineering - A Workload Analysis Study
This paper presents the study of running several core multimedia applications on a simultaneous multithreading (SMT) architecture and derives design principles for multimedia soft...
Yen-Kuang Chen, Rainer Lienhart, Eric Debes, Matth...
MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
15 years 5 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang