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IPPS
1999
IEEE
15 years 2 months ago
A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
ISCA
2005
IEEE
90views Hardware» more  ISCA 2005»
15 years 3 months ago
Optimizing Replication, Communication, and Capacity Allocation in CMPs
Chip multiprocessors (CMPs) substantially increase capacity pressure on the on-chip memory hierarchy while requiring fast access. Neither private nor shared caches can provide bot...
Zeshan Chishti, Michael D. Powell, T. N. Vijaykuma...
EUROPAR
2007
Springer
14 years 11 months ago
Nested Parallelism in the OMPi OpenMP/C Compiler
This paper presents a new version of the OMPi OpenMP C compiler, enhanced by lightweight runtime support based on user-level multithreading. A large number of threads can be spawne...
Panagiotis E. Hadjidoukas, Vassilios V. Dimakopoul...
DAC
2010
ACM
14 years 10 months ago
QuickYield: an efficient global-search based parametric yield estimation with performance constraints
With technology scaling down to 90nm and below, many yield-driven design and optimization methodologies have been proposed to cope with the prominent process variation and to incr...
Fang Gong, Hao Yu, Yiyu Shi, Daesoo Kim, Junyan Re...
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
15 years 3 months ago
A near optimal deblocking filter for H.264 advanced video coding
- We propose a near optimal hardware architecture for deblocking filter in H.264/MPEG-4 AVC. We propose a novel filtering order and a data reuse strategy that result in significant...
Shen-Yu Shih, Cheng-Ru Chang, Youn-Long Lin