622 search results - page 66 / 125 » Comparing the Optimal Performance of Multiprocessor Architec... |
195
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NOCS
2009
IEEE
16 years 7 days ago
2009
IEEE
While NoCs are efficient in delivering high throughput point-to-point traffic, their multi-hop operation is too slow for latency sensitive signals. In addition, NoCS are inefficie...
169
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ITNG
2008
IEEE
15 years 12 months ago
2008
IEEE
This paper presents several parallel FFT algorithms with different degree of communication overhead for multiprocessors in Network-on-Chip(NoC) environment. Three different method...
141
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SSDBM
2009
IEEE
16 years 7 days ago
2009
IEEE
We present a novel sensor network query processing architecture that (a) covers all the query optimization phases that are required to map a declarative query to executable code; ...
138
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ISCAS
2006
IEEE
15 years 11 months ago
2006
IEEE
In this paper a 173-bit type II ONB ECC processor Section II introduces the mathematical backgrounds for for inductive RFID applications is described. Compared with curve operation...
167
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DAC
2005
ACM
15 years 7 months ago
2005
ACM
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...