Sciweavers

1461 search results - page 11 / 293
» Comparing the Optimal Performance of Parallel Architectures
Sort
View
CASES
2007
ACM
15 years 1 months ago
Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
Hoeseok Yang, Sungchan Kim, Hae-woo Park, Jinwoo K...
IPPS
2010
IEEE
14 years 7 months ago
Highly scalable parallel sorting
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...
Edgar Solomonik, Laxmikant V. Kalé
CLUSTER
2004
IEEE
15 years 1 months ago
On optimizing collective communication
In this paper we discuss issues related to the highperformance implementation of collective communications operations on distributed-memory computer architectures. Using a combina...
E. W. Chan, M. F. Heimlich, Avi Purkayastha, Rober...
DATE
2008
IEEE
79views Hardware» more  DATE 2008»
15 years 4 months ago
System Performance Optimization Methodology for Infineon's 32-Bit Automotive Microcontroller Architecture
Microcontrollers are the core part of automotive Electronic Control Units (ECUs). A significant investment of the ECU manufacturers and even their customers is linked to the speci...
Albrecht Mayer, Frank Hellwig
CF
2010
ACM
15 years 2 months ago
Exposing parallelism and locality in a runtime parallel optimization framework
Runtime parallel optimization has been suggested as a means to overcome the difficulties of parallel programming. For runtime parallel optimization to be effective, parallelism a...
David A. Penry, Daniel J. Richins, Tyler S. Harris...