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» Comparing the Optimal Performance of Parallel Architectures
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130
Voted
DAC
2003
ACM
16 years 4 months ago
Synthesizing optimal filters for crosstalk-cancellation for high-speed buses
We present practical algorithms for the synthesis of crosstalk cancelling equalizing filters. We examine designs optimized for the traditional l2 metric and introduce an approach ...
Jihong Ren, Mark R. Greenstreet
INTENSIVE
2009
IEEE
15 years 10 months ago
Accelerating K-Means on the Graphics Processor via CUDA
In this paper an optimized k-means implementation on the graphics processing unit (GPU) is presented. NVIDIA’s Compute Unified Device Architecture (CUDA), available from the G8...
Mario Zechner, Michael Granitzer
113
Voted
SIES
2008
IEEE
15 years 9 months ago
Performance evaluation of a java chip-multiprocessor
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
Christof Pitter, Martin Schoeberl
97
Voted
DAC
2007
ACM
16 years 4 months ago
High Performance and Low Power Electronics on Flexible Substrate
We propose a design and optimization methodology for high performance and ultra low power digital applications on flexible substrate using Low Temperature Polycrystalline Silicon ...
Jing Li, Kunhyuk Kang, Aditya Bansal, Kaushik Roy
194
Voted
IFIP
2004
Springer
15 years 8 months ago
The Inherent Queuing Delay of Parallel Packet Switches
The parallel packet switch (PPS) extends the inverse multiplexing architecture, and is extensively used as the core of contemporary commercial switches. A key factor in the perfor...
Hagit Attiya, David Hay