1461 search results - page 135 / 293 » Comparing the Optimal Performance of Parallel Architectures |
142
click to vote
CGO
2003
IEEE
15 years 8 months ago
2003
IEEE
To meet the performance demands of modern architectures, compilers incorporate an everincreasing number of aggressive code transformations. Since most of these transformations are...
110
Voted
IPPS
2010
IEEE
15 years 1 months ago
2010
IEEE
We present a number of optimization techniques to compute prefix sums on linked lists and implement them on multithreaded GPUs using CUDA. Prefix computations on linked structures ...
154
click to vote
CODES
2006
IEEE
15 years 9 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
134
click to vote
MICRO
2002
IEEE
15 years 8 months ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
106
click to vote
HPCA
2008
IEEE
16 years 3 months ago
2008
IEEE
As multicore systems become the dominant mainstream computing technology, one of the most difficult challenges the industry faces is the software. Applications with large amounts ...