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» Comparing the Optimal Performance of Parallel Architectures
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118
Voted
ISCAS
2005
IEEE
129views Hardware» more  ISCAS 2005»
15 years 9 months ago
A reconfigurable architecture for scanning biosequence databases
—Unknown protein sequences are often compared to a set of known sequences (a database scan) to detect functional similarities. Even though efficient dynamic programming algorithm...
Timothy F. Oliver, Bertil Schmidt, Douglas L. Mask...
136
Voted
ERSA
2006
133views Hardware» more  ERSA 2006»
15 years 4 months ago
An FPGA based Co-Design Architecture for MIMO Lattice Decoders
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
Cao Liang, Jing Ma, Xin-Ming Huang
148
Voted
AIPR
2008
IEEE
15 years 5 months ago
Low-cost, high-speed computer vision using NVIDIA's CUDA architecture
In this paper, we introduce real time image processing techniques using modern programmable Graphic Processing Units (GPU). GPUs are SIMD (Single Instruction, Multiple Data) device...
Seung In Park, Sean P. Ponce, Jing Huang, Yong Cao...
140
Voted
ADT
2005
15 years 3 months ago
On Multiple Slice Turbo Codes
: The main problem concerning the hardware implementation of turbo codes is the lack of parallelism in the MAP-based decoding algorithm. This paper proposes to overcome this proble...
David Gnaedig, Emmanuel Boutillon, Michel Jé...
IWOMP
2009
Springer
15 years 8 months ago
Dynamic Task and Data Placement over NUMA Architectures: An OpenMP Runtime Perspective
Abstract. Exploiting the full computational power of current hierarchical multiprocessor machines requires a very careful distribution of threads and data among the underlying non-...
François Broquedis, Nathalie Furmento, Bric...