1461 search results - page 152 / 293 » Comparing the Optimal Performance of Parallel Architectures |
127
Voted
ICS
1995
Tsinghua U.
15 years 7 months ago
1995
Tsinghua U.
Modulo scheduling is an e cient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirement...
168
Voted
PEWASUN
2008
ACM
15 years 4 months ago
2008
ACM
There has been extensive research focused on maximizing the throughput of wireless networks in general and mesh networks in particular. Recently, techniques have been developed th...
136
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IEEEPACT
2000
IEEE
15 years 7 months ago
2000
IEEE
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
118
Voted
INFOCOM
2006
IEEE
15 years 9 months ago
2006
IEEE
— While structured P2P systems (such as DHTs) are often regarded as an improvement over unstructured P2P systems (such as super-peer networks) in terms of routing efficiency, it...
125
Voted
TVLSI
2008
15 years 3 months ago
2008
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...