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» Comparing the Optimal Performance of Parallel Architectures
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IPPS
2003
IEEE
15 years 8 months ago
Wide-Area Content-Based Routing Mechanism
Content networking is an emerging technology, where the requests for content are steered by content routers that examine not only the destinations but also content descriptors suc...
Arindam Mitra, Muthucumaru Maheswaran, Jose A. Rue...
100
Voted
HOTI
2002
IEEE
15 years 8 months ago
A Four-Terabit Single-Stage Packet Switch with Large Round-Trip Time Support
We present the architecture and practical VLSI implementation of a 4-Tb/s single-stage switch. It is based on a combined input- and crosspoint-queued structure with virtual output...
François Abel, Cyriel Minkenberg, Ronald P....
153
Voted
CDES
2009
170views Hardware» more  CDES 2009»
15 years 4 months ago
Benchmarking GPU Devices with N-Body Simulations
Recent developments in processing devices such as graphical processing units and multi-core systems offer opportunities to make use of parallel techniques at the chip level to obt...
Daniel P. Playne, Mitchell Johnson, Kenneth A. Haw...
GLVLSI
2007
IEEE
166views VLSI» more  GLVLSI 2007»
15 years 7 months ago
Efficient pipelining for modular multiplication architectures in prime fields
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid...
ISMAR
2007
IEEE
15 years 9 months ago
A System Architecture for Ubiquitous Tracking Environments
Ubiquitous tracking setups, covering large tracking areas with many heterogeneous sensors of varying accuracy, require dedicated middleware to facilitate development of stationary...
Manuel Huber, Daniel Pustka, Peter Keitler, Floria...