1461 search results - page 171 / 293 » Comparing the Optimal Performance of Parallel Architectures |
151
Voted
JSA
2007
15 years 3 months ago
2007
Mapping of applications on a Multiprocessor System-on-Chip (MP-SoC) is a crucial step to optimize performance, energy and memory constraints at the same time. The problem is formu...
115
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ISCA
2002
IEEE
15 years 8 months ago
2002
IEEE
The impact of pipeline length on the performance of a microprocessor is explored both theoretically and by simulation. An analytical theory is presented that shows two opposing ar...
147
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ASAP
2005
IEEE
15 years 9 months ago
2005
IEEE
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
110
Voted
AINA
2006
IEEE
15 years 9 months ago
2006
IEEE
In this paper we study the problem of scheduling messages between two parallel machines connected by a low latency network during a data redistribution. We compare two approaches....
135
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HIPC
2003
Springer
15 years 8 months ago
2003
Springer
Abstract— In this work, we demonstrate the power of providing a common set of operating system services to Grid Architectures, including high-performance I/O, communication, reso...