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» Comparing the Optimal Performance of Parallel Architectures
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127
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IPPS
2006
IEEE
15 years 9 months ago
Accelerating DTI tractography using FPGAs
Diffusion Tensor Imaging (DTI) tractography in Magnetic Resonance Imaging (MRI) is a computationally intensive procedure, requiring on the order of tens of minutes to complete tr...
Kwatra Kwatra, Viktor K. Prasanna, Mitali Singh
158
Voted
ISHPC
1999
Springer
15 years 8 months ago
Instruction-Level Microprocessor Modeling of Scientific Applications
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Kirk W. Cameron, Yong Luo, James Scharzmeier
124
Voted
FCCM
2009
IEEE
165views VLSI» more  FCCM 2009»
15 years 10 months ago
Accelerating Quadrature Methods for Option Valuation
This paper presents an architecture for FPGA acceleration of quadrature methods used for pricing complex options, such as discrete barrier, Bermudan, and American options. The arc...
Anson H. T. Tse, David B. Thomas, Wayne Luk
166
Voted
ICRA
2010
IEEE
185views Robotics» more  ICRA 2010»
15 years 2 months ago
MOPED: A scalable and low latency object recognition and pose estimation system
— The latency of a perception system is crucial for a robot performing interactive tasks in dynamic human environments. We present MOPED, a fast and scalable perception system fo...
Manuel Martinez, Alvaro Collet, Siddhartha S. Srin...
140
Voted
LCTRTS
2009
Springer
15 years 10 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava