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» Comparing the Optimal Performance of Parallel Architectures
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109
Voted
HPCA
2003
IEEE
16 years 4 months ago
Mini-Threads: Increasing TLP on Small-Scale SMT Processors
Several manufacturers have recently announced the first simultaneous-multithreaded processors, both as single CPUs and as components of multi-CPU chips. All are small scale, compr...
Joshua Redstone, Susan J. Eggers, Henry M. Levy
130
Voted
IJCNN
2007
IEEE
15 years 10 months ago
Implementation of multi-layer leaky integrator networks on a cellular processor array
- We present an application of a massively parallel processor array VLSI circuit to the implementation of neural networks in complex architectural arrangements. The work was motiva...
David R. W. Barr, Piotr Dudek, Jonathan M. Chamber...
116
Voted
FPL
2008
Springer
111views Hardware» more  FPL 2008»
15 years 5 months ago
Sampling from the exponential distribution using independent Bernoulli variates
The exponential distribution is a key distribution in many event-driven Monte-Carlo simulations, where it is used to model the time between random events in the system. This paper...
David B. Thomas, Wayne Luk
127
Voted
VLSISP
1998
128views more  VLSISP 1998»
15 years 3 months ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian
158
Voted
JTRES
2010
ACM
15 years 3 months ago
The embedded Java benchmark suite JemBench
Requirements to embedded systems increase steadily. In parallel, also the performance of the processors used in these systems is improved leading to multithreaded and/or multicore...
Martin Schoeberl, Thomas B. Preußer, Sascha ...