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» Comparing the Optimal Performance of Parallel Architectures
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JUCS
2006
112views more  JUCS 2006»
15 years 1 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
15 years 7 months ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...
ICS
2007
Tsinghua U.
15 years 8 months ago
Automatic nonblocking communication for partitioned global address space programs
Overlapping communication with computation is an important optimization on current cluster architectures; its importance is likely to increase as the doubling of processing power ...
Wei-Yu Chen, Dan Bonachea, Costin Iancu, Katherine...
SIGSOFT
2008
ACM
16 years 2 months ago
A scalable technique for characterizing the usage of temporaries in framework-intensive Java applications
Framework-intensive applications (e.g., Web applications) heavily use temporary data structures, often resulting in performance bottlenecks. This paper presents an optimized blend...
Bruno Dufour, Barbara G. Ryder, Gary Sevitsky
SASP
2008
IEEE
162views Hardware» more  SASP 2008»
15 years 8 months ago
Accelerating Compute-Intensive Applications with GPUs and FPGAs
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadr...