1461 search results - page 239 / 293 » Comparing the Optimal Performance of Parallel Architectures |
DCOSS
2006
Springer
15 years 3 months ago
2006
Springer
Abstract. We have developed a new on-line error modeling and optimizationbased localization approach for sensor networks in the presence of distance measurement noise. The approach...
TKDE
2002
14 years 11 months ago
2002
In this paper, we have developed a HiTi (Hierarchical MulTi) graph model for structuring large topographical road maps to the minimum cost route computation. The HiTi graph model p...
IPPS
2010
IEEE
14 years 9 months ago
2010
IEEE
Transactional memory is an alternative programming model for managing contention in accessing shared in-memory data objects. Distributed transactional memory (TM) promises to alle...
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ADHOC
2011
14 years 7 months ago
2011
Acoustic underwater wireless sensor networks (UWSN) have recently gained attention as a topic of research. Such networks are characterized by increased uncertainty in medium acces...
MICRO
2009
IEEE
15 years 6 months ago
2009
IEEE
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...