1461 search results - page 255 / 293 » Comparing the Optimal Performance of Parallel Architectures |
115
Voted
ISSS
2002
IEEE
15 years 6 months ago
2002
IEEE
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
144
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CORR
2011
Springer
14 years 8 months ago
2011
Springer
Markov Logic Networks (MLNs) have emerged as a powerful framework that combines statistical and logical reasoning; they have been applied to many data intensive problems including...
ICS
2003
Tsinghua U.
15 years 7 months ago
2003
Tsinghua U.
Cache behavior modeling is an important part of modern optimizing compilers. In this paper we present a method to estimate the number of cache misses, at compile time, using a mac...
124
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CGO
2010
IEEE
15 years 8 months ago
2010
IEEE
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
100
Voted
IPPS
2010
IEEE
14 years 11 months ago
2010
IEEE
Many P2P systems have been designed without taking into account an important factor: a large fraction of Internet users nowadays are located behind a network address translator (NA...