1461 search results - page 51 / 293 » Comparing the Optimal Performance of Parallel Architectures |
146
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ICS
2007
Tsinghua U.
15 years 8 months ago
2007
Tsinghua U.
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...
110
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ATS
2001
IEEE
15 years 5 months ago
2001
IEEE
Test access is a major problem for core-based systemon-chip (SOC) designs. Since cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms...
ARC
2008
Springer
15 years 3 months ago
2008
Springer
Abstract. Loops are an important source of optimization. In this paper, we address such optimizations for those cases when loops contain kernels mapped on reconfigurable fabric. We...
118
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HPCA
2000
IEEE
15 years 6 months ago
2000
IEEE
Processor architectures with tens to hundreds of arithmetic units are emerging to handle media processing applications. These applications, such as image coding, image synthesis, ...
131
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TIP
2008
15 years 1 months ago
2008
Abstract--In this paper, we analyze the computational challenges in implementing particle filtering, especially to video sequences. Particle filtering is a technique used for filte...