1461 search results - page 72 / 293 » Comparing the Optimal Performance of Parallel Architectures |
121
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IEEEPACT
2005
IEEE
15 years 7 months ago
2005
IEEE
Global address space languages like UPC exhibit high performance and portability on a broad class of shared and distributed memory parallel architectures. The most scalable applic...
117
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CCGRID
2001
IEEE
15 years 5 months ago
2001
IEEE
Active networks allow computations to be performed innetwork at routers as messages pass through them. Active networks offer unique opportunities to optimize networkcentric applic...
123
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CAL
2006
15 years 1 months ago
2006
This paper evaluates asymmetric cluster chip multiprocessor (ACCMP) architectures as a mechanism to achieve the highest performance for a given power budget. ACCMPs execute serial ...
HPCA
2001
IEEE
16 years 2 months ago
2001
IEEE
A new memory subsystem called Memory Expansion Technology (MXT) has been built for compressing main memory contents. MXT effectively doubles the physically available memory. This ...
119
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ICVS
2001
Springer
15 years 6 months ago
2001
Springer
Abstract. At the first ICVS, we presented SA-C (“sassy”), a singleassignment variant of the C programming language designed to exploit both coarse-grain and fine-grain parallel...