Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...
Abstract: The paper describes the humanoid robot \H6", which was designed to serve as a platform for experimental research on the development of advanced humanoid-type robots....
Satoshi Kagami, Koichi Nishiwaki, James J. Kuffner...
Dynamic power management in enterprise environments requires an understanding of the relationship between resource utilization and system-level power consumption. Power models bas...
Since on-chip routers in Network-on-Chips play a key role in on-chip communication between cores, they should be always preparing for packet injections even if a part of cores are ...
We introduce Branch Predictor Prediction (BPP) as a power-aware branch prediction technique for high performance processors. Our predictor reduces branch prediction power dissipat...