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ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
16 years 1 months ago
Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion
In this paper, we study the full-chp interconnect power modeling. ,We show that repeater,insertion is no longer sufficient to achievethe targetfrequencies specifiedhy ITRS, and de...
Weiping Liao, Lei He
PRDC
2007
IEEE
15 years 10 months ago
Power-Performance Trade-Off of a Dependable Multicore Processor
As deep submicron technologies are advanced, new challenges, such as power consumption and soft errors, are emerging. A naïve technique, which utilizes emerging multicore process...
Toshinori Sato, Toshimasa Funaki
APCCAS
2006
IEEE
229views Hardware» more  APCCAS 2006»
15 years 10 months ago
Low Power Combinational Multipliers using Data-driven Signal Gating
— A data driven approach to design and optimization of low power combinational multipliers is presented. This technique depends on signal gating to avoid un-necessary computation...
Nima Honarmand, Ali Afzali-Kusha
ICMCS
2006
IEEE
98views Multimedia» more  ICMCS 2006»
15 years 10 months ago
Unequal Iterative Decoding for Power Efficient Video Transmission
We present an unequal iterative decoding (UID) approach for minimization of the receiver power consumption subject to a given quality of service, by exploiting data partitioning a...
Yongfang Wang, Songyu Yu, Xiaokang Yang
VTC
2006
IEEE
116views Communications» more  VTC 2006»
15 years 10 months ago
Distributed Estimation in a Power Constrained Sensor Network
— This paper derives the optimum non-uniform quantization scheme for a distributed estimation problem based on noisy observations in a wireless sensor network. The optimal quanti...
Visvakumar Aravinthan, Sudharman K. Jayaweera, Kos...