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ISCAS
2007
IEEE
136views Hardware» more  ISCAS 2007»
15 years 10 months ago
Flexible Low Power Probability Density Estimation Unit For Speech Recognition
— This paper describes the hardware architecture for a flexible probability density estimation unit to be used in a Large Vocabulary Speech Recognition System, and targeted for m...
Ullas Pazhayaveetil, Dhruba Chandra, Paul Franzon
ISVLSI
2006
IEEE
137views VLSI» more  ISVLSI 2006»
15 years 10 months ago
Low Power Layered Space-Time Channel Detector Architecture for MIMO Systems
This paper presents the low power implementation of a Maximum Likelihood (ML) based detector used in the receiver part of a Multiple Input and Multiple Output (MIMO) systems. Low ...
T. Takahashi, Ahmet T. Erdogan, Tughrul Arslan, J....
AINA
2005
IEEE
15 years 10 months ago
CAM-Based Huffman Decoding Made Power Efficient
Ternary content addressable (TCAM) is favorable for high-speed search due to its parallel architecture and ability for searching arbitrary-length keys. However, the usage of TCAM ...
Pi-Chung Wang, Chun-Liang Lee, Yuan-Rung Yang, Hun...
DATE
2005
IEEE
121views Hardware» more  DATE 2005»
15 years 10 months ago
Joint Power Management of Memory and Disk
This paper presents a scheme to combine memory and power management for achieving better energy reduction. Our method periodically adjusts the size of physical memory and the time...
Le Cai, Yung-Hsiang Lu
SBCCI
2005
ACM
132views VLSI» more  SBCCI 2005»
15 years 9 months ago
Design and power optimization of CMOS RF blocks operating in the moderate inversion region
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier ...
Leonardo Barboni, Rafaella Fiorelli