3955 search results - page 147 / 791 » Comparing the Power of Robots |
143
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ISQED
2010
IEEE
15 years 2 months ago
2010
IEEE
This paper studies multi-core clock distribution using active deskewing methods. We propose an efficient methodology that uses Verilog-A to model PLLs, clock trees and power suppl...
118
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ESSCIRC
2011
14 years 4 months ago
2011
— Within-functional-block fine-grained adaptive dual supply voltage control (FADVC) is proposed to reduce the power of CMOS logic circuits. Both process and design variations wi...
267
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VLSI
2012
Springer
13 years 12 months ago
2012
Springer
e technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set sim...
121
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DAC
2007
ACM
16 years 5 months ago
2007
ACM
Packet-switched networks on chip (NoC) have been advocated as a natural communication mechanism among the processing cores in future chip multiprocessors (CMP). However, electroni...
124
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VLSID
2008
IEEE
16 years 4 months ago
2008
IEEE
Compared to subthreshold leakage, dynamic power is normally much less sensitive to the process variation due to its approximately linear relation to the process parameters. Howeve...