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ENGL
2007
180views more  ENGL 2007»
15 years 4 months ago
Reordering Algorithm for Minimizing Test Power in VLSI Circuits
— Power consumption has become a crucial concern in Built In Self Test (BIST) due to the switching activity in the circuit under test(CUT). In this paper we present a novel metho...
K. Paramasivam, K. Gunavathi
JSAC
2006
101views more  JSAC 2006»
15 years 4 months ago
Distributed space-time coding for multihop transmission in power line communication networks
In this paper, we consider transmission in relatively wide-stretched power line communication (PLC) networks, where repeaters are required to bridge the source-to-destination dista...
Lutz H.-J. Lampe, Robert Schober, Simon Yiu
JCM
2007
90views more  JCM 2007»
15 years 4 months ago
Peak to Average Power Ratio Reduction for Multicarrier Systems Using Dirty Paper Coding
— In this paper, we improve the peak to average power ratio reduction scheme for multicarrier systems proposed by Collings and Clarkson by applying dirty paper coding with peak p...
Pin-Hsun Lin, Shih-Chun Lin, Hsuan-Tien Liu, Hsuan...
HIS
2009
15 years 2 months ago
Improved Harmony Search for Economic Power Dispatch
This paper presents a novel optimization approach using Improved Harmony Search (IHS) algorithm to solve economic power dispatch problem. The proposed methodology easily takes care...
V. Ravikumar Pandi, Bijaya K. Panigrahi, Manas Kum...
DAC
2001
ACM
16 years 5 months ago
A2BC: Adaptive Address Bus Coding for Low Power Deep Sub-Micron Designs
Due to larger buses (length, width) and deep sub-micron effects where coupling capacitances between bus lines are in the same order of magnitude as base capacitances, power consum...
Haris Lekatsas, Jörg Henkel